SAMSUNG SMPS power supply BN44-00191A circuit diagram - FSQ0165 - FAN7530 - MC33067 - LCD Television repair and service - Power supply schematics
Category: LCD Television Repair and Service
Contents of this article
- FSQ0165 Details
- FAN 7530 Details
- Power supply schematic
SAMSUNG BN44-00191A
FSQ0165
Description
A Valley Switching Converter generally shows lower EMI and
higher power conversion efficiency than a conventional hard-switched converter
with a fixed switching frequency. The FSQ-series is an integrated Pulse-Width
Modulation (PWM) controller and SenseFET specifically designed for valley
switching operation with minimal external components. The PWM controller
includes an integrated fixed-frequency oscillator, under-voltage lockout,
Leading-Edge Blanking (LEB), optimized gate driver, internal soft-start, temperature-compensated
precise current sources for loop compensation, and self-protection circuitry. Compared
with discrete MOSFET and PWM controller solutions, the FSQ-series reduces total
cost, component count, size and weight; while simultaneously increasing efficiency,
productivity, and system reliability. This device provides a basic platform for
cost-effective designs of valley switching fly-back converters.
PIN
CONFIGURATION
1 GND
SenseFET source terminal on primary side and internal
control ground.
2 Vcc
Positive supply voltage input. Although connected to an
auxiliary transformer winding, current is supplied from pin 5 (Vstr) via an
internal switch during startup. It is not until \/CC reaches the UVLO upper
threshold (12V) that the internal startup switch opens and device power is
supplied via the auxiliary transformer winding.
3 Vfb
The feedback voltage pin is the non-inverting input to
the PWM comparator. It has a 0.9mA current source connected internally while a
capacitor and opto-coupler are typically connected externally. There is a time
delay while charging external capacitor C“, from 3V to 6V using an internal 5pA
current source. This delay prevents false triggering under transient
conditions, but still allows the protection mechanism to operate under true overload
conditions.
4 Sync
This pin is internally connected to the sync-detect
comparator for valley switching. Typically the voltage of the auxiliary winding
is used as Sync input voltage and external resistors and capacitor are needed
to make delay to match valley point. The threshold of the internal sync
comparator is 0.?Vf0.2V.
5 Vstr
This pin is connected to the rectified AC line voltage
source. At startu p, the internal switch supplies internal bias and charges an
external storage capacitor placed between the Vcc pin and ground. Once the \/CC
reaches 12V, the internal switch is opened.
6,7,8 Drain
The drain pins are designed to connect directly to the primary
lead of the transformer and are capable of switching a maximum of 650V. Minimizing
the length of the trace connecting these pins to the transformer decreases
leakage inductance.
FAN7530
Description
The FAN7530 is an active power factor correction (PFC) controller
for the boost PFC applications that operates in critical conduction mode (CRM).
It uses the voltage mode PWM that compares an internal ramp signal with the
error amplifier output to generate MOSFET turn-off signal. Because the voltage
mode CRM PFC controller does not need the rectified AC line voltage information,
it can save the power loss of the input voltage sensing net- work necessary for
the current mode CRM PFC control- ler. FAN753O provides many protection
functions such as over voltage protection, open-feedback protection, over- current
protection, and under-voltage lockout protection. The FAN7530 can be disabled
if the INV pin voltage is lower than 0.45V and the operating current decreases
to 65uA. Using a new variable on-time control method, THD is lowerthan the
conventional CRM boost PFC lCs.
PIN
COFIGURATION
1 INV
This pin is the inverting input of the error amplifier.
The output voltage of the boost PFC converter should be resistively divided to
2.5V.
2 MOT
This pin is used to set the slope of the internal ramp. The
voltage of this pin is maintained at 3V. If a resistor is connected between
this pin and GND, current flows out of the pin and the slope of the internal
ramp is proportional to this current.
3 COMP
This pin is the output of the transconductance error amplifier.
Components for the out- put voltage compensation should be connected between
this pin and GND.
4 CS
This pin is the input of the over-current protection comparator.
The MOSFET current is sensed using a sensing resistor and the resulting voltage
is applied to this pin. An internal RC filter is included to filter switching
noise.
5 ZCD
This pin is the input of the zero current detection
block. If the voltage of this pin goes higherthan 1.5V, then goes lowerthan
1.4V, the MOSFET is turned on.
6 GND
This pin is used for the ground potential of all the
pins. For proper operation, the signal ground and the power ground should be
separated.
7 OUT
This pin is the gate drive output. The peak sourcing and
sinking current levels are +500mA and -800mA respectively. For proper operation,
the stray inductance in the gate driving path must be minimized.
8 Vcc
This pin is the IC supply pin. IC current and MOSFET drive
current are supplied using this pin.
POWER SUPPLY SCHEMATIC DIAGRAM
